Direct absorption of energy from the sunlight faces another considerable problem connected with operation of electronic devices under elevated temperatures due to variation of band gap of semiconductors, increase of thermal noise, etc. A partial solution to this problem can be offered by the use of passive/active radiators that will dissipate some of excessive heat. Further development of this idea leads to the use of hybrid systems that allow to process
part of solar light via photoelectric conversion, storing thermal energy, for example, by heating water that can be used for household needs. This, however, does not allow to reduce the problems of high-temperature operation of an electronic device (solar cell) considerably. A useful solution can be glimpsed from the nanoelectronics, which also have problems with removal of excess heat from the integrated circuits. Thermal management in these devices has become problematic because faster and denser circuits are required to meet the modern needs, which, in turn, produces even more heat. Localized areas of high heat flux influences the performance at both the chip and the board levels for the current nanotechnologies.
Key concepts like waste heat recycling or waste heat recovery are the basic ideas in the design of the newest heat protection and dissipation systems. The potential applications of the thermoelectric devices are thus enormous. Thermoelectricity is the revolutionary technology that is currently under intense development aiming to find a solution to thermal management problem and protection of small-scale systems. However, due to relatively low efficiency (around 10%), thermoelectric cooling is generally only used in small systems; the new concepts based on nanoscale heat transfer bring a new opportunity to widen the application horizons for thermoelectric devices.
As expected, technology scaling significantly impacts power dissipation issues. The scale – connected effects for silicon-on-insulator (SOI) technology affect electrical properties of the material. Joule heat generated in SOI transistors may compromise long term reliability of the device. The thermal conductivity of the channel region of nanometer transistors is significantly reduced by phonon confinement and boundary scattering. This increases the thermal resistance of the device, leading to higher operating temperatures compared to the bulk transistors of the same power input. However, ballistic transport between the material boundaries impedes device cooling, so that temperature-dependent parameters of the device such as source-drain current and threshold-current will increase significantly, generating much Joule heat that will eventually lead to accelerated temperature degradation of the gate dielectric [32, 33]. The recently developed germanium-on-insulator (GeOI) technology combines high carrier mobility with the advantages of the SOI structure, offering an attractive integration platform for the future CMOS devices [34].
SiGe nanostructures are very promising for thermoelectric cooling of microelectronic devices and high-temperature thermoelectric power generation. It has been demonstrated that the thermal conductivity is significantly reduced in super-lattices [35-37] and quantum dot super-lattices [38-40]. A self-organized set of vertically stacked Si/Ge quantum dots is a good alternative to induce artificial scattering of phonons and reduce the thermal conductivity. One of the ways to increase scattering even more involves creation of the structure where with uncorrelated vertical positions of quantum dots, reducing the effective thermal path of the phonon within the Si layer as shown in Figure 13. The phonons travelling by the pathway laid by Ge quantum dots will experience higher scattering than phonons travelling through the Si pathway only. This effect becomes even more efficient because, in fact, the phonons spreading through Ge quantum dots will suffer a sequence of scattering events from one dot to another. As one can see from the figure, temperature-dependent cross-plane thermal conductivity reduces dramatically in Ge
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quantum dot superlattices depending on vertical correlation between dots, with at least twice lower thermal conductivity value obtained for the case of uncorrelated dot structures in comparison with well-aligned dot array with the same vertical spacing of 20 nm. The same result can be confirmed by Raman spectroscopy [41].
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Correlated Quantun Dots
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Blocked Pathways to Phonons
Uncorrelated Quantum Dots
50 100 150 200 250 300 0 10 20 30 40 50 60 70 80
Temperature(K)
Figure 13. Dependence of thermal conductivity on the temperature for correlated and uncorrelated Ge quantum dot structures
Thin film single-crystalline GeOI structures may be considered as potential candidates in the field of CMOS microelectronics improving thermal performance of transistors due to superior mobility of carriers compared to other semiconductors. Recent predictions in the thermal conductivity of ultra-thin germanium films suggest that the small bulk mean free path of Ge will induce a weaker effect on the boundary scattering [42]. This thermal behavior is an additional reason that makes GeOI structures competitive with SOI for the case of small-size thin film devices at the cutting edge of the technology. For example, it has been reported from Monte Carlo modeling that electro-thermally optimized GeOI structures should be 30% more productive than the best SOI device examples [34]. In addition, the higher mobility of germanium implies that GeOI devices might support the same amount of current at lower operating voltage, so that the dissipated power is expected to be lower [42].
Figure 14 shows a plot of the intrinsic out-of-plane thermal conductivity variation with thickness at 300 K. In spite of low thermal conductivity of bulk Ge compared to that of Si (кСє/к5і ~ 0.4), ultra-thin films of germanium has smaller thermal conductivity due to reduced mean free path. Hence, ultra-thin films of Ge suffer from a lower reduction of the thermal conductivity compared to ultra-thin films of Si, which makes germanium-on-insulator structures promising candidates for devices with reduced self-heating effects compared to silicon-on-insulator structures [43].
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Figure 14. Dependence of thermal conductivity к on film thickness for different materials. |
The experience obtained with aforementioned thermoelectric applications can be successfully applied to the field of photovoltaics, forming efficient heat-draining layers either on the frontal surface of solar cells that suffer highest temperature increase or over the contact grid that, in addition to solar heating, also experiments Joule heat.
2. Conclusions
This chapter addresses a wide number of topics concerning thin-film solar cells. It was shown that the numerical modeling of current transport in AlGaAs/GaAs heterojunctions allows to determine optimal aluminum content (that defines band gap difference of the junction components) ensuring the most efficient processing of the incident light flux by window and absorber layers. We found that for very thin window layers the proximity of the junction area to the surface of the cell has more prominent role, allowing the embedded field of space charge region to function more intensively in separation of photo-generated currents and reducing the effect of recombination phenomena.
The question concerning quality improvement of junction boundary is reflected in the second section that presents results concerning the use of isovalent substitution method for manufacturing of heterojunction solar cells. As substituted layers grow into the substrate, we obtain a smooth transition of one material into another that reduces the difference of lattice constants and thermal expansion coefficients, both of which are of high importance for photovoltaic devices. Good efficiency values for non-optimized cells without any special anti-reflection coatings and with considerable series resistance paves the way for future improvements.
A special attention is being paid to creation of cheap and environment-friendly technologies for solar cells; this point is illustrated with an example of CdS/PbS heterojunctions created by ammonia-free chemical bath deposition. It is thought that these results will be interesting for large-scale industrial production of solar cells.
We address the important questions of organic solar cells, which nowadays attract much attention of the scientific community. These photovoltaic devices has lower efficiency in comparison with silicon or tandem multi-junction cells, but they are incomparably cheaper and can use flexible substrates, which opens completely new and wide horizons for their possible applications. We also discuss the problems of the proper choice of organic material for the active element of the cell.
Finally, solar cells are always overheated due to exposure to a direct sunlight, which makes a considerable problem concerning degradation of device parameters under prolonged operation under elevated temperatures, as well as mechanical stability of the cell due to thermal expansion of its components. We propose to make some useful parallels with nanoelectronics, which recently received promising solutions in a form of thermoelectric heat transfer managing devices. We hope that the similar techniques could be applied to solar cells, offering good results with temperature control for photovoltaics, especially those operating under concentrated sunlight conditions.
